USB2.0 PHY – シリコンライブラリ株式会社
USB 2.0 PHY IP in 40LP - T2M IP
Mixed-Signal Verification for USB 2.0 Physical Layer IP
USB v2.0 soft PHY and USB v2.0 device SIE
USB 2.0 PHY IP Core
The USB 2.0 Device IP core | Arasan Chip Systems
USB2 Controller | Cadence
PCIe/USB/SATA PHY 適用例 | Renesas
USB 2.0 OTG IP Core | Arasan Chip Systems
USB and USB Type-C® Electrical Test Solutions – Teledyne LeCroy
Ch334 usb2.0高速mtt 6kv,内蔵USB phy (480mbps),低コスト,20ピース/ロット _ - AliExpress Mobile
XPS USB 2.0 Host Controller – Missing Link Electronics
TUSB1210 のデータシート、製品情報、およびサポート | TI.com
Figure 2 from Verilog synthesis of USB 2.0 full-speed device PHY IP | Semantic Scholar
USB2.0 Soft IP: An Introduction to GOWIN Semiconductor's USB Solution for FPGA's - YouTube
High Speed Inter-CHIP USB 2.0 PHY | Arasan Chip Systems
Synopsys IP Technical Bulletin: USB High Speed Inter-Chip (HSIC) IP: What is it? And why should I use it?
USB2.0 PHY
USB2 PHY | Cadence
HSIC USB 2.0 PHY IP
USB 2.0 Extender Control Chip CH317 - NanjingQinhengMicroelectronics
Verilog synthesis of USB 2.0 full-speed device PHY IP | Semantic Scholar
USB 2.0 Full High Speed Solution | NXP Semiconductors
USB and USB Type-C® Electrical Test Solutions – Teledyne LeCroy
Archimago's Musings: MEASUREMENTS: Computer USB port noise, USB hubs and the 8kHz PHY Microframe Packet Noise
USB 3.0 PHY (Host/Device/OTG/Hub) - IP Solution - INNOSILICON
USB v2.0 soft PHY and USB v2.0 device SIE
